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CVE-2018-5407

Published: Nov 15, 2018Updated: Nov 21, 2024 Sources: CVE List NVD BDUCWE-200
4.7CVSSMEDIUM

Description

Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.

CVSS Vector Breakdown

AV:LAC:HPR:LUI:NS:UC:HI:NA:N
Exploitability
AV:LAttack Vector
Local
AC:HAttack Complexity
High
PR:LPrivileges Required
Low
UI:NUser Interaction
None
Scope
S:UScope
Unchanged
Impact
C:HConfidentiality
High
I:NIntegrity
None
A:NAvailability
None

Weaknesses

Affected Products

canonical ltd.commercialGBOperating Systemsaka canonical
oracle corp.commercialUSDatabasesaka oracle
red hat inc.commercialUSOperating Systemsaka red hat
сообщество свободного программного обеспеченияoss-projectOperating Systemsaka сообщество свободного программного обеспечения, fsf
and 53 more affected products View all →

Attack Graph

Products CVE Techniques Tactics

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Exploitability

2 exploit sources identified

Exploit details including PoC links, Metasploit modules, and scanner templates are available after registration.

View exploit details
Official Patch Available

MITRE ATT&CK

2 techniques
Collection
Discovery
View detailed technique mapping

References

and 34 more references View all →

Timeline

Published
Nov 15, 2018
Last Updated
Nov 21, 2024

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